1. Technical Field
The embodiments described herein relate to semiconductor memory devices and a methods of manufacturing the same and, more particularly, to a semiconductor memory device having a capacitor which is formed in a substrate and a method of manufacturing the same.
2. Related Art
A conventional Dynamic Random Access Memory (DRAM) device includes a storage cell that is made up of a capacitor. Memory operations are carried out by the charging and discharging of the capacitor.
The capacitor in a conventional DRAM is formed either as a stack type structure on a semiconductor substrate or as a trench structure in the semiconductor substrate. Recently, as the integration of conventional semiconductor memory device has increased, the patterns used to form various structures within the device have decreased, as has the size of the capacitor used to form the memory cells in a conventional DRAM. However, the capacitance must still remain the same, or even be higher, in spite of the reduced size of the capacitor.
There are several methods that can be used to maintain or increase the capacitance. Fore example, one method is to increase an area of a lower electrode that forms part of the capacitor. Another method is to make a dielectric layer forming part of the capacitor thin.
In the first method, i.e., increasing the area of the lower electrode, a 3-dimensional structure is employed in the capacitor. For example, the 3-dimensional structure can be a cylindrical or fin structure. This method of using a 3-dimensional lower electrode can increase the capacitance of the capacitor; however, complex manufacturing processes are needed and breakage of the lower electrode is common.
The second method, i.e., making the dielectric layer thin, runs into permittivity limits. That is, a conventional dielectric layer is formed by a silicon oxide (SiO2) layer or an ONO (oxide-nitride-oxide) layer of a thickness of below at least 100 (10 nm) to obtain the required capacitance. However, in the case that the silicon oxide layer and the ONO layer are formed to a thickness of below 100, the reliability of the thin film deteriorates and leakage current can result.